In micro computer systems, watchdog timers are used for error detection, widely. Although this method is available for errors of long duration, it is not effective for errors that subside quickly. This paper considers about validity of watchdog timers by means of statistical treatment. In this consideration, watchdog timers are treated as a sort of sampling inspections, and behavior of a CPU in case of transient fault is simulated. Furthermore, a concept of new watchdog timer that is about 500 times as confident as usual one for wider errors is proposed.